DAC 99 Slides
TauSim is a high performance synchronous Verilog simulator with support for X and Z values. Release 4.0 supports multiple independent clocks while retaining the high simulation speed and fast compilation of previous releases. RTL constructs, gates, and transistors continue to be optimized, with gate level designs simulating at speeds similar to the corresponding RTL code.
TauSim is highly optimized for large Verilog designs with fast compilation, efficient memory utilization and extremely high simulation speed.
A synchronous simulator like TauSim provides much higher performance than timing simulation and is very accurate when combined with static timing analysis. TauSim uses the full Verilog value set - 0, 1, X, and Z - to model a design, so floating, shorted, or uninitialized logic is easily detected.
TauSim runs on a number of platforms, providing a wide range of cost effective simulation options. TauSim is designed for portability, so it can easily be ported to other architectures as needed. The high simulation speed and fast compilation of TauSim can simplify testing and debugging, leading to more thorough verification and higher quality designs.
TauSim simulations can be run as a single compile and simulate operation, or can be separated into precompilation and simulate passes. When run as separate passes, the design is compiled once and an intermediate design file is written. Subsequent simulations have very low startup time, which is useful for large designs and for designs requiring a large number of simulations.
TauSim precompilation is platform independent. This allows a design to be compiled on one type of platform and simulated on another. In a mixed architecture environment of Solaris and Linux systems, this is very convenient. Since simulation requires less memory than design compilation, extremely large designs can be compiled on large memory Solaris systems and then run on smaller memory Linux systems. This can be a very simple and cost effective simulation technique.
We are continuing our ongoing plan to extend TauSim toward the full IEEE Verilog specification while maintaining superior performance. Tau is pricing technical support and product upgrades to allow our customers to easily benefit from these improvements.
Copyright 2001 Tau Simulation